Microsemi corporation (MSCC) puts technology to work for people. We offer a comprehensive portfolio of semiconductor and system solutions for communications, defense & security, aerospace and industrial markets. Products include high-performance and radiation-hardened analog mixed-signal integrated circuits, FPGAs, SoCs and ASICs; power management products; timing and synchronization devices and precise time solutions, setting the world’s standard for time; voice processing devices; RF solutions; discrete components; security technologies and scalable anti-tamper products; Ethernet solutions; Power-over-Ethernet ICs and midspans; as well as custom design capabilities and services. Microsemi is headquartered in Aliso Viejo, Calif., and has approximately 4,300 employees globally in 23 countries.
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- Write verification specifications, verification plans, and documentation
- Develop test bench and automate regression plans
- Be responsible for simulations, verifications, and debugging of logic designs (schematics, RTL)
- Be responsible for developing test benches , test cases and verification flow components for Soc based FPGA
- Develop tests with software/firmware flow used in SoC FPGA verification
- Development of Behavioral models using Verilog and SystemVerilog
- Develop Coverage driven Verification flows
- Develop and complete block-level verification and contribute on test development for SoC FPGA full chip level verification
- Bring a self-motivated and enthusiastic approach that will achieve any new requirements and
- overcome all challenges
- Able to work independently with minimal support and handle complex Block and Subsystem
- Verification platform
- Able to debug the logic designs for design intent and Interface with cross-functional teams and
- collaboration in all verification related activities
- Qualifications: BSEE or MSEE
Required Skills and Experience:
- Minimum of 6 months to 2 years of related work experience.
- Hands on project experience in RTL Verification
- Strong knowledge on digital fundamentals and understanding of FPGA/ custom chip flow
- Hands on knowledge on Verilog and SystemVerilog
- Hands on knowledge in C, C++ language
- Experience in FPGA programming and related software usage with Firmware handling knowledge is a plus.
- Exposure to SVF and STAPL/JAM: Adaptive FPGA Programming is a plus
- Good Knowledge in logic design and analysis
- Experience with UNIX shell scripting or Perl scripting
- Experience in Verilog, SystemVerilog Modeling is recommended
- Exposure to SoC FPGA flow concepts
- Exposure to knowledge on System Verilog Assertions, Functional Coverage and Scoreboard developmen
- Experience with leading edge simulator tools is recommended
- Good analytical and problem solving skills
- Excellent written and verbal communication in English.
- Willingness to travel on short notices occasionally.